/* Copyright (c) 2025 Beijing Semidrive Technology Corporation
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#ifndef I2C_UAPI_H_
#define I2C_UAPI_H_
#include "Platform_Types.h"
#include "Std_Types.h"
#include "I2c_Types.h"
#include "Sdrv_I2c_drv.h"
#include "I2c_Cfg.h"

#define I2C_MODULE_ID                   (2051U)
#define I2C_INSTANCE_ID                 (0u)

#define I2C_E_PARAM_INVALID             (0x01u)
#define I2C_E_UNINIT                    (0x02u)
#define I2C_E_INIT_FAILURE              (0x03u)
#define I2C_E_NOT_ENABLE                (0x04u)
#define I2C_E_CLEAR_FIFO_FAILURE        (0x05u)
#define I2C_E_TRANSMIT_EXCEPTION        (0x06u)
#define I2C_E_INTERRUPT_EXCEPTION       (0x07u)
#define I2C_E_TIMMING_EXCEPTION         (0x08u)
#define I2C_E_RESET_EXCEPTION           (0x09u)

#define I2C_TRANSTATE_ID                (0x01u)
#define I2C_INITSTATE_ID                (0x02u)
#define I2C_TRANSFER_ID                 (0x03u)
#define I2C_WRITE_ID                    (0x04u)
#define I2C_READ_ID                     (0x05u)
#define I2C_WRITE_READ_ID               (0x06u)
#define I2C_REGISTER_SLAVE_ID           (0x07u)
#define I2C_ADAP_EARLYINIT_ID           (0x08u)
#define I2C_ADAP_INIT_ID                (0x09u)
#define I2C_MASTER_IRQ_HANDLER_ID       (0x0Au)
#define I2C_SLAVE_IRQ_HANDLER_ID        (0x0Bu)
#define I2C_JOBFUNCTION_ID              (0x0Cu)
#define I2C_INIT_ID                     (0x0Du)
#define I2C_RECOVER_ID                  (0x0Eu)
#define I2C_SET_HIGHSPEED_MODE_ID       (0x0Fu)
#define I2C_DEINIT_ID                   (0x10u)

#define I2C_M_NOSTART       0x4000U
#define I2C_CACHE_LINE      32U


extern I2c_msg_t I2c_msgs[I2C_CHN_NUM][SDRV_I2C_MSG_NUM_MAX];
/**  I2C handler */
extern sdrv_I2c_dev_t *const I2c_Handler[CPU_MAX_CORE_NUMBER];
extern CONST(I2c_adap_cfg_t, I2C_CONST) I2c_ChannelCfg[I2C_CHN_NUM];

Std_ReturnType I2c_SetHighSpeedMode(uint8 channelId, I2c_speed_t speed, uint8 mastercode);
Std_ReturnType I2c_Transfer(uint8 channelId, struct I2c_msg *msgs, uint8 num);
Std_ReturnType I2c_Write(uint8 channelId, uint16 addr, uint8 *wbuf, uint16 wlen);
Std_ReturnType I2c_Read(uint8 channelId, uint16 addr, uint8 *rbuf, uint16 rlen);
Std_ReturnType I2c_WriteRead(uint8 channelId, uint16 addr,
                             uint8 *wbuf, uint16 wlen,  uint8 *rbuf, uint16 rlen);

Std_ReturnType I2c_ForceTranstate(uint8 channelId, uint32 set_transtate);
I2c_trans_state_t I2c_GetTranState(uint8 channelId);
I2c_init_state_t I2c_GetInitState(uint8 channelId);

Std_ReturnType I2c_Init(const I2c_adap_cfg_t *ConfigPtr);
Std_ReturnType I2c_Deinit(void);
void I2c_MainfunctionHandling(void);

I2c_recov_state_t I2c_Recover(uint8 channelId);

#endif
